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EAGLE Library Structure
File details
| File name: | stm32f.lbr |
| Uploaded by: | m3cortex |
| Download options: | Download original file from DIYmodules.org ( 54.3 KiB )Download file converted to the latest EAGLE format ( 54.3 KiB ) |
Library description
This file has no description inside.
Below description of the library from CadSoft webpage:
STM32F405, STM32F407 footprints
List of devices
| Name & variants | Symbol | Package |
|---|---|---|
| STM32F405XX | Features ⢠Core: ARM 32-bit Cortexâ¢-M4 CPU with FPU, Adaptive real-time accelerator (ART Acceleratorâ¢) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/ 1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions ⢠Memories â Up to 1 Mbyte of Flash memory â Up to 192+4 Kbytes of SRAM including 64- Kbyte of CCM (core coupled memory) data RAM â Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR and NAND memories ⢠LCD parallel interface, 8080/6800 modes ⢠Clock, reset and supply management â 1.8 V to 3.6 V application supply and I/Os â POR, PDR, PVD and BOR â 4-to-26 MHz crystal oscillator â Internal 16 MHz factory-trimmed RC (1% accuracy) â 32 kHz oscillator for RTC with calibration â Internal 32 kHz RC with calibration ⢠Low power â Sleep, Stop and Standby modes â VBAT supply for RTC, 20Ã32 bit backup registers + optional 4 KB backup SRAM ⢠3Ã12-bit, 2.4 MSPS A/D converters: up to 24 channels and 7.2 MSPS in triple interleaved mode ⢠2Ã12-bit D/A converters ⢠General-purpose DMA: 16-stream DMA controller with FIFOs and burst support ⢠Up to 17 timers: up to twelve 16-bit and two 32- bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input ⢠Debug mode â Serial wire debug (SWD) & JTAG interfaces â Cortex-M4 Embedded Trace Macrocell⢠⢠Up to 140 I/O ports with interrupt capability â Up to 136 fast I/Os up to 84 MHz â Up to 138 5 V-tolerant I/Os ⢠Up to 15 communication interfaces â Up to 3 à I2C interfaces (SMBus/PMBus) â Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control) â Up to 3 SPIs (42 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock â 2 à CAN interfaces (2.0B Active) â SDIO interface ⢠Advanced connectivity â USB 2.0 full-speed device/host/OTG controller with on-chip PHY â USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI â 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII ⢠8- to 14-bit parallel camera interface up to 54 Mbytes/s ⢠True random number generator ⢠CRC calculation unit ⢠96-bit unique ID ⢠RTC: subsecond accuracy, hardware calendar | |
Variants: |
 |
 |
| STM32F40X | Features ⢠Core: ARM 32-bit Cortexâ¢-M4 CPU with FPU, Adaptive real-time accelerator (ART Acceleratorâ¢) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/ 1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions ⢠Memories â Up to 1 Mbyte of Flash memory â Up to 192+4 Kbytes of SRAM including 64- Kbyte of CCM (core coupled memory) data RAM â Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR and NAND memories ⢠LCD parallel interface, 8080/6800 modes ⢠Clock, reset and supply management â 1.8 V to 3.6 V application supply and I/Os â POR, PDR, PVD and BOR â 4-to-26 MHz crystal oscillator â Internal 16 MHz factory-trimmed RC (1% accuracy) â 32 kHz oscillator for RTC with calibration â Internal 32 kHz RC with calibration ⢠Low power â Sleep, Stop and Standby modes â VBAT supply for RTC, 20Ã32 bit backup registers + optional 4 KB backup SRAM ⢠3Ã12-bit, 2.4 MSPS A/D converters: up to 24 channels and 7.2 MSPS in triple interleaved mode ⢠2Ã12-bit D/A converters ⢠General-purpose DMA: 16-stream DMA controller with FIFOs and burst support ⢠Up to 17 timers: up to twelve 16-bit and two 32- bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input ⢠Debug mode â Serial wire debug (SWD) & JTAG interfaces â Cortex-M4 Embedded Trace Macrocell⢠⢠Up to 140 I/O ports with interrupt capability â Up to 136 fast I/Os up to 84 MHz â Up to 138 5 V-tolerant I/Os ⢠Up to 15 communication interfaces â Up to 3 à I2C interfaces (SMBus/PMBus) â Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control) â Up to 3 SPIs (42 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock â 2 à CAN interfaces (2.0B Active) â SDIO interface ⢠Advanced connectivity â USB 2.0 full-speed device/host/OTG controller with on-chip PHY â USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI â 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII ⢠8- to 14-bit parallel camera interface up to 54 Mbytes/s ⢠True random number generator ⢠CRC calculation unit ⢠96-bit unique ID ⢠RTC: subsecond accuracy, hardware calendar | |
Variants: |
 |
 |
List of symbols
| Name | View | Description |
|---|---|---|
| STM32F405XX | |
|
| STM32F40X | |
List of packages
| Name | View | Description |
|---|---|---|
| LQFP100 | |
|
| LQFP64 | |