Facebook Official Page
Share EAGLE library
Have you created EAGLE library?
Did you find an interesting library?
Why not share with the community?
DIY Modules Eagle Library version 1.8.0 has been released.
DIY Modules Eagle Library version 1.7.0 has been released.
DIY Modules Eagle Library version 1.6.0 has been released.
Search for EAGLE Library
Ohter interesting searches:
A4988 SENSOR BLUETOOTH MODULE HEADER ANTENNA BOURNS ESP32 ATMEGA328P TL431 NRF24L01 ATMEGA328 IRF BOURNS BLUETOOTH MODULE 315 MHZ PCB ANTENNA 1N CAPACITOR CERAMIC PANASONIC MURATA VISHAY ACS712 ARDUINO UNO ATX CONNECTOR CON RN
EAGLE Library Structure
|Uploaded by:||Youcef Chaoua|
|Download options:||Download original file|
( 11.6 KiB )Download file converted
to the latest EAGLE format
( 25.8 KiB )
This file has no description inside.
Below description of the library from CadSoft webpage:
|Name & variants||Symbol||Package|
|DSPIC33FJXXXGP802||High-Performance, 16-bit Digital Signal Controllers - dsPIC33FJ64GP802 &
Source: http://ww1.microchip.com/downloads/en/DeviceDoc/70292B.pdf Operating Range: . Up to 40 MIPS operation (at 3.0-3.6V): - Industrial temperature range (-40Â°C to +85Â°C) - Extended temperature range (-40Â°C to +125Â°C) High-Performance DSC CPU: . Modified Harvard architecture . C compiler optimized instruction set . 16-bit wide data path . 24-bit wide instructions . Linear program memory addressing up to 4M instruction words . Linear data memory addressing up to 64 Kbytes . 83 base instructions: mostly 1 word/1 cycle . Two 40-bit accumulators with rounding and saturation options . Flexible and powerful addressing modes: - Indirect - Modulo - Bit-Reversed . Software stack . 16 x 16 fractional/integer multiply operations . 32/16 and 16/16 divide operations . Single-cycle multiply and accumulate: - Accumulator write back for DSP operations - Dual data fetch . Up to Â±16-bit shifts for up to 40-bit data On-Chip Flash and SRAM: . Flash program memory . Data SRAM . Boot, Secure, and General Security for program Flash Direct Memory Access (DMA): . 8-channel hardware DMA . Up to 2 Kbytes dual ported DMA buffer area (DMA RAM) to store data transferred via DMA: - Allows data transfer between RAM and a peripheral while CPU is executing code (no cycle stealing) . Most peripherals support DMA Timers/Capture/Compare/PWM: . Timer/Counters, up to five 16-bit timers: - Can pair up to make two 32-bit timers - One timer runs as a Real-Time Clock with an external 32.768 kHz oscillator - Programmable prescaler . Input Capture (up to four channels): - Capture on up, down or both edges - 16-bit capture input functions - 4-deep FIFO on each capture . Output Compare (up to four channels): - Single or Dual 16-bit Compare mode - 16-bit Glitchless PWM mode . Hardware Real-Time Clock/Calendar (RTCC): - Provides clock, calendar, and alarm functions Interrupt Controller: . 5-cycle latency . 118 interrupt vectors . Up to 49 available interrupt sources . Up to three external interrupts . Seven programmable priority levels . Five processor exceptions Digital I/O: . Peripheral pin Select functionality . Up to 35 programmable digital I/O pins . Wake-up/Interrupt-on-Change for up to 21 pins . Output pins can drive from 3.0V to 3.6V . Up to 5V output with open drain configuration . All digital input pins are 5V tolerant . 4 mA sink on all I/O pins System Management: . Flexible clock options: - External, crystal, resonator, internal RC - Fully integrated Phase-Locked Loop (PLL) - Extremely low jitter PLL . Power-up Timer . Oscillator Start-up Timer/Stabilizer . Watchdog Timer with its own RC oscillator . Fail-Safe Clock Monitor . Reset by multiple sources Power Management: . On-chip 2.5V voltage regulator . Switch between clock sources in real time . Idle, Sleep, and Doze modes with fast wake-up Analog-to-Digital Converters (ADCs): . 10-bit, 1.1 Msps or 12-bit, 500 Ksps conversion: - Two and four simultaneous samples (10-bit ADC) - Up to 13 input channels with auto-scanning - Conversion start can be manual or synchronized with one of four trigger sources - Conversion possible in Sleep mode - Â±2 LSb max integral nonlinearity - Â±1 LSb max differential nonlinearity Audio Digital-to-Analog Converter (DAC): . 16-bit Dual Channel DAC module . 100 Ksps maximum sampling rate . Second-Order Digital Delta-Sigma Modulator Data Converter Interface (DCI) module: . Codec interface . Supports I2S and AC.97 protocols . Up to 16-bit data words, up to 16 words per frame . 4-word deep TX and RX buffers Comparator Module: . Two analog comparators with programmable input/output configuration CMOS Flash Technology: . Low-power, high-speed Flash technology . Fully static design . 3.3V (Â±10%) operating voltage . Industrial and Extended temperature . Low power consumption Communication Modules: . 4-wire SPI (up to two modules): - Framing supports I/O interface to simple codecs - Supports 8-bit and 16-bit data - Supports all serial clock formats and sampling modes . I2C?: - Full Multi-Master Slave mode support - 7-bit and 10-bit addressing - Bus collision detection and arbitration - Integrated signal conditioning - Slave address masking . UART (up to two modules): - Interrupt on address bit detect - Interrupt on UART error - Wake-up on Start bit from Sleep mode - 4-character TX and RX FIFO buffers - LIN bus support - IrDAÂ® encoding and decoding in hardware - High-Speed Baud mode - Hardware Flow Control with CTS and RTS . Enhanced CAN (ECAN. module) 2.0B active: - Up to eight transmit and up to 32 receive buffers - 16 receive filters and three masks - Loopback, Listen Only and Listen All - Messages modes for diagnostics and bus monitoring - Wake-up on CAN message - Automatic processing of Remote Transmission Requests - FIFO mode using DMA - DeviceNet. addressing support . Parallel Master Slave Port (PMP/EPSP): - Supports 8-bit or 16-bit data - Supports 16 address lines . Programmable Cyclic Redundancy Check (CRC): - Programmable bit length for the CRC generator polynomial (up to 16-bit length) - 8-deep, 16-bit or 16-deep, 8-bit FIFO for data input
|DIL28-3||Dual In Line - 28-Pin SDIP 300 mil|
|SO28W||Wide Small Outline package - 28-Pin SOIC 300 mil|