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EAGLE Library Object

File details

File name:m-pad-2.1.lbr
Uploaded by:Juergen Messerer
Remarks:This library is a part of the archive file m-pad-2.1.zip
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Object details

Name:ISP1761
Type:device
Description:Philips Semiconductor's ISP1761 Hi-Speed Universal Serial Bus On-The-Go controller

Description:

The ISP1761 is a single-chip Hi-Speed Universal Serial Bus (USB) On-The-Go (OTG)
Controller integrated with the Advanced Philips Slave Host Controller and the Philips
ISP1582 Peripheral Controller.
The Hi-Speed USB Host Controller and Peripheral Controller comply to Universal Serial
Bus Specification Rev. 2.0 and support data transfer speeds of up to 480 Mbit/s. The
Enhanced Host Controller Interface (EHCI) core implemented in the Host Controller is
adapted from Enhanced Host Controller Interface Specification for Universal Serial Bus
Rev. 1.0. The OTG Controller is compliant with On-The-Go Supplement to the USB
Specification Rev. 1.0a.
The ISP1761 has three USB ports. Port 1 can be configured to function as a downstream
port, an upstream port or an OTG port; ports 2 and 3 are always configured as
downstream ports. The OTG port can switch its role from host to peripheral, and
peripheral to host. The OTG port can become a host through the Host Negotiation
Protocol (HNP) as specified in the OTG supplement.

Features: Compliant with Universal Serial Bus Specification Rev. 2.0; supporting data transfer at high-speed (480 Mbit/s), full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s) Integrated Transaction Translator (TT) for Original USB (full-speed and low-speed) peripheral support Three USB ports that support three operational modes:
- Mode 1: Port 1 is an OTG Controller port, and ports 2 and 3 are Host Controller ports
- Mode 2: Ports 1, 2 and 3 are Host Controller ports
- Mode 3: Port 1 is a Peripheral Controller port, and ports 2 and 3 are Host Controller ports
Supports OTG Host Negotiation Protocol (HNP) and Session Request Protocol (SRP) Multitasking support with Virtual Segmentation feature (up to four banks) High-speed memory controller (variable latency and SRAM external interface) Directly addressable memory architecture Generic processor interface to most CPUs, such as Hitachi SH-3 and SH-4, Philips XA, Intel StrongARM, NEC and Toshiba MIPS, Motorola DragonBall and PowerPC Reduced Instruction Set Computer (RISC) processors Configurable 32-bit and 16-bit external memory data bus Supports Programmed I/O (PIO) and Direct Memory Access (DMA) Slave DMA implementation on CPU interface for reducing the host system?s CPU load ..... Applications:

The ISP1761 can be used to implement a dual-role USB device in any application, USB host or USB peripheral, depending on the cable connection. If the dual-role device is
connected to a typical USB peripheral, it behaves like a typical USB host. The dual-role device can also be connected to a PC or any other USB host and behave like a typical
USB peripheral.

Mobile phone to/from: Mobile phone: exchange contact information Digital still camera: e-mail pictures or upload pictures to the web MP3 player: upload/download/broadcast music Mass storage: upload/download files Scanner: scan business cards
Digital still camera to/from: Digital still camera: exchange pictures Mobile phone: e-mail pictures, upload pictures to the web Printer: print pictures Mass storage: store pictures
Printer to/from: Digital still camera: print pictures Scanner: print scanned image Mass storage: print files stored in a device
MP3 player to/from: MP3 player: exchange songs Mass storage: upload/download songs
Oscilloscope to/from: Printer: print screen image
Personal digital assistant to/from: Personal digital assistant: exchange files Printer: print files Mobile phone: upload/download files MP3 player: upload/download songs Scanner: scan pictures Mass storage: upload/download files Global Positioning System (GPS): obtain directions, mapping information Digital still camera: upload pictures Oscilloscope: configure oscilloscope
Please send any comments to: messi@users.sourceforge.net

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ISP1761LQFP

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ISP1761TFBGA

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